Total No of Vacancies: 01
Job Location: Chennai (Tamil Nadu)
Name of the Post & No of Vacancies:
SI No
|
Name of Post
|
No. of Post
|
1.
|
Lab Engineer
|
01
|
Total
|
01
| |
Educational Qualification:
SI No
|
Name of Post
|
Qualification
|
1.
|
Lab Engineer
|
B.Tech / B.E (ECE) / M.E / M.Tech degree in VLSI Design with minimum 6.5 CGPA( or 60% marks) Desirable qualification Experience in VLSI / Related area, working knowledge in VLSI tools like Cadence / Synopsys / Mentor / Xilinx, etc., publication in reputed Journals
|
Age Limit:
Name of the Category
|
Age Limit
|
For Gen/ UR Candidates
|
30 Years
|
The Upper age limit is relaxed by 5 years for SC/ST; 3 years for OBC, 10 Years for Persons with Disabilities (15 years for SC/ST PWD’s & 13 years for OBC PWD’s) and for Ex-S as per Govt. of India rules. Candidates Relaxation in Upper Age limit will be provided as per Govt. Rules.
